Junghee Lee

Welcome to Digital System Design Lab

The digital design system lab is led by Junghee Lee, an Assistant Professor in Department of Electrical and Computer Engineering, University of Texas at San Antonio. The mission of the lab is to make digital systems more efficient and secure, and make design methodologies more designer-friendly.

Hardware-assisted Security
Cyber security is getting more attention nowadays because our daily life is getting more and more dependent on digital infrastructure. We believe hardware-assisted security is one of the promising areas in the security field because the hardware can serve as a root of trust for security solutions. We are developing a powerful hardware platform that can be used to implement various types of software security solutions so that the software techniques can be protected by hardware mechanisms. In other words, the software protects the host system, and the hardware protects the software from being compromised. Potentially, it could trigger a major paradigm shift in the host-side security.

Networks on Chip
The ever-increasing number of on-chip processing cores necessitates a scalable on-chip communication backbone. On the other hand, the power wall forces the communication architecture to be extremely power-efficient. To achieve these two opposing goals, we proposed a ring-based on-chip router that offers better scalability and incurs less overhead than state-of-the-art low-cost routers.
The flit size is one of key parameters that have significant impact on the performance and cost of on-chip routers. Since there has been no prior discussion on the optimal flit size in networks-on-chip, we made the first attempt to address it considering various aspects of the system. In addition, we proposed a novel router architecture that fully utilizes the physical channel width.
We observed that there is non-negligible amount of single-flit packets in the network. They do not benefit from a worm-hole routing algorithm which is the most well-known flow control algorithm. To expedite the single-flit packets, we proposed a novel on-chip router architecture that logically segregates single-flit packets by a single entity of a router.

Solid State Drives
Garbage collection (GC) is a mechanism that reclaims stale pages to make free space. However, while GC is running, incoming requests cannot be serviced. Since GC takes much longer than read and write operations, it has significant adverse impact on overall system performance. To mitigate the impact of GC, we proposed preemptable GC implementation that allows incoming requests to delay on-going GC and substantially improved the system performance.
Offering high performance as well as high reliability, redundant array of independent disks (RAIDs) are usually employed in storage systems. RAIDs can consist of SSDs. Since it was empirically observed that uncoordinated GC in individual SSDs degrades the overall performance, we augmented coordination mechanisms to the RAID controller and SSDs and enhanced the performance while reducing cost.
A write-buffer can be employed to reduce the access time to SSDs. Instead of flushing pending requests immediately from the write-buffer to the memory, aligning requests across SSDs in the array improves the performance substantially at a minimal cost. In this project, we are investigating the feasibility of several aligning techniques.

Ph.D

• Mandrita Banerjee

Master

• Ryan Walker
• Carlo Borges
• David Rodriguez
• Aditya Kalapala
• Sreenivas Sudarshan Seshadri
• Shalit Dubey

Alumni

• Monobrata Debnath (Ph.D)
• Ruta Dandekar
• Raveena Chamala
• Carlo Borges
• Angel Carter
• Aditya Kalapala
• Shalit Dubey
• Sruthilaya Venkatachari
• Raunak Jain
• Prathyusha Kadiyala
• Amit Patki
• Mostafa Hasan
• Chaitanya Duddella
• Shiv Charan Kasoju
• Sai Chandra Neel Dodda
• Dheeraj Varma Namburi
• Anudeep Reddy Donthiri
• Gaurav Pippalla
• Bhanu Teja Patibandla
• Praveena Gotru
• Vamsikrishna Veerapaneni
• Vinit Bakare
• Aatika Maheen FNU
• Kalidas Ganesh
• Ameya Kathapurkar
• Sree Akhila Gorige
• Abhinav Jayanthy
• Keerthi Naladala
• Sai Sriram Pasupuleti
• Venkat Pavan Krishna Amirneni
• Sai Vineeth Putchala
• Raj Sanjay Rohan Kodukula
• Sai Kumar Reddy Modugula
• Manhar Vemuri
• Nihar Shrikant Bendre
• Tarun Kurian

Published in peer reviewed journals

1. Ronnie Mativenga, Joon-Young Paik, Youngjae Kim, Tae-Sun Chung, and Junghee Lee, “RFTL: Improving Performance of Selective Caching-based Page-level FTL through Replication,” to appear in Springer Journal of Cluster Computing.
2. Mandrita Banerjee, Junghee Lee, and Kim-Kwang Raymond Choo, “A Blockchain Future to Internet of Things Security: A Position Paper,” to appear in Elsevier Journal of Digital Communications and Networks.
3. Junghee Lee, Kalidas Ganesh, Hyuk-Jun Lee, and Youngjae Kim, “FESSD: A Fast Encrypted SSD Employing On-Chip Access-Control Memory,” IEEE Computer Architecture Letters (CAL), Vol. 16, Issue 2, December 2017, pp.115-118
4. Kalidas Ganesh, Youngjae Kim, Monobrata Debnath, Sungyong Park and Junghee Lee, “LAWC: Optimizing Write Cache using Layout-Aware I/O Scheduling for All Flash Storage,” IEEE Transactions on Computers (TC), Vol. 66, Issue 11, November 2017, pp. 1890-1902.
5. Jaehyun Park, Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Vinson Young, Junghee Lee, and Jongman Kim, “HoPE: Hot-cacheline Prediction for Dynamic Early Decompression in Compressed LLCs,” ACM Transactions on Design Automation of Electronic Systems (TODAES), Vol. 22, Issue 3, April 2017.
6. Monjur Alam, Zhe Cheng Lee, Chrysostomos Nicopoulos, Kyu Hyung Lee, Jongman Kim, and Junghee Lee, “SBBox: A Tamper-Resistant Digital Archiving System,” International Journal of Cyber-Security and Digital Forensics (IJCSDF), Vol. 5, Issue 3, August 2016, pp. 122-131.
7. Anastasios Psarras, Junghee Lee, Ioannis Seitanidis, Chrysostomos Nicopoulos, and Giorgos Dimitrakopoulos, “PhaseNoC: Versatile Network Traffic Isolation through TDM-Scheduled Virtual Channels,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 35, Issue 5, May 2016, pp. 844-857.
8. Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee and Jongman Kim, “Size-Aware Cache Management for Compressed Cache Architectures,” IEEE Transactions on Computers (TC), Vol. 64, Issue 8, August 2015, pp. 2337-2352.
9. Junghee Lee, Youngjae Kim, Jongman Kim, and Galen M. Shipman, “Synchronous I/O Scheduling of Independent Write Caches for an Array of SSDs,” IEEE Computer Architecture Letters (CAL), Vol. 14, Issue 1, June 2015, pp. 79-82.
10. Youngjae Kim, Junghee Lee, Sarp Oral, David A. Dillow, Feiyi Wang, and Galen M. Shipman, “Coordinating Garbage Collection for Arrays of Solid-state Drives,” IEEE Transactions on Computers (TC), Vol. 63, Issue 4, April 2014, pp. 888-901.
11. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, and Jongman Kim, “Centaur: a Hybrid Network-on-Chip Architecture Utilizing Micro-network Fusion,” Springer Journal of Design Automation for Embedded Systems (DAEM), March 2014, pp. 1-19.
12. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, and Jongman Kim, “TornadoNoC: A Lightweight and Scalable On-Chip Network Architecture for the Many-Core Era,” ACM Transactions on Architecture and Code Optimization (TACO), Vol. 10, Issue 4, December, 2013, pp. 1-30.
13. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, and Jongman Kim, “Sharded Router: A Novel On-Chip Router Architecture Employing Bandwidth Sharding and Stealing,” Elsevier Journal of Parallel Computing (PARCO), Vol. 39, Issue 9, September 2013, pp. 372-388.
14. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Shreepad Panth, Sung Kyu Lim, and Jongman Kim, “IsoNet: Hardware-based Job Queue Management for Manycore Architectures,” IEEE Transactions on Very Large Scale Integration Systems (TVLSI), Vol. 21, Issue 6, 2013, pp. 1080-1093.
15. Junghee Lee, Youngjae Kim, Galen M. Shipman, Sarp Oral, and Jongman Kim, “Preemptible I/O Scheduling of Garbage Collection for Solid State Drives,” IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD), Vol. 32, February 2013, pp. 247-260.
16. Junghee Lee and Joonhwan Yi, “Improving Memory Efficiency of Dynamic Memory Allocators for Real-Time Embedded Systems,” ETRI Journal, Vol. 33, No. 2, April 2011, pp, 230-239.
17. Junghee Lee and Jongman Kim, “A Frame Study for Post-Processing Analysis on System Behavior: A Case Study of Deadline Miss Detection,” Journal of Computer Science, Vol. 6, No. 12, 2010, pp. 1499-1504.
18. Junghee Lee and Joonhwan Yi, “Budgeted Memory Allocator for Embedded Systems” Journal of the Institute of Electronics Engineers of Korea, Vol. 45-SC, No. 2, pp. 61-70, March, 2008.

Published in peer reviewed conferences

1. Mandrita Banerjee, Junghee Lee, Qian Chen, and Kim-Kwang Raymond Choo, “Blockchain-based Security Layer for Identification and Isolation of Malicious Things in IoT: A Conceptual Design,” in Proc. of International Workshop on Internet on Things: Privacy, Security and Trust (IoTPST), 2018
2. Junghee Lee, Monobrata Debnath, Amit Patki, Mostafa Hasan, and Chrysostomos Nicopoulos, “Hardware-based Online Self-diagnosis for Faulty Device Identification in Large-scale IoT Systems,” in Proc. of ACM/IEEE International Conference on Internet-of-Things Design and Implementation (IoTDI), 2018
3. Chintan Chavda, Ethan C. Ahn, Yu-Sheng Chen, Youngjae Kim, Kalidas Ganesh, and Junghee Lee, “Vulnerability Analysis of On-Chip Access-Control Memory,” in Proc. of USENIX Workshop on Hot Topics in Storage and File Systems (HotStorage), 2017
4. Monobrata Debnath, Dimitris Konstantinou, Chrysostomos Nicopoulos, Giorgos Dimitrakopoulos, Wei-Ming Lin, and Junghee Lee, “Low-Cost Congestion Management in Networks-on-Chip Using Edge and In-Network Traffic Throttling,” in Proc. of International Workshop on Advanced Interconnect Solutions and Technologies for Emerging Computing Systems (AISTECS), 2017
5. Anastasios Psarras, Junghee Lee, Pavlos Mattheakis, Chrysostomos Nicopoulos and Giorgos Dimitrakopoulos, “A Low-Power Network-on-Chip Architecture for Tile-based Chip Multi-Processors,” in Proc. of ACM International Conference on Great Lakes Symposium on VLSI (GLSVLSI), 2016
6. Junghee Lee, Chrysostomos Nicopoulos, Gi Hwan Oh, Sang-Won Lee, and Jongman Kim, “Hardware-assisted Intrusion Detection by Preserving Reference Information Integrity,” in Proc. of the 13th International Conference on Algorithms and Architectures for Parallel Processing (ICA3PP), 2013
7. Junghee Lee, Chrysostomos Nicopoulos, Sung Joo Park, Madhavan Swaminathan, and Jongman Kim, “Do We Need Wide Flits in Networks-On-Chip?,” in Proc. of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2013.
8. Seungcheol Baek, Hyung Gyu Lee, Chrysostomos Nicopoulos, Junghee Lee, and Jongman Kim, “ECM: Effective Capacity Maximizer for High-Performance Compressed Caching,” in Proc. of IEEE International Symposium on High Performance Computer Architecture (HPCA), 2013.
9. Junghee Lee, Hyung Gyu Lee, Soonhoi Ha, Jongman Kim, and Chrysostomos Nicopoulos, “A Programmable Processing Array Architecture Supporting Dynamic Task Scheduling and Module-Level Prefetching,” in Proc. of ACM International Conference on Computing Frontiers (CF), 2012.
10. Junghee Lee, Chrysostomos Nicopoulos, Hyung Gyu Lee, Dongkun Shin, and Jongman Kim, “Hermes: Scalable Load Distribution Engine for General-Purpose Computing on Graphics Processing Units (GPGPU),” in Proc. of International Conference on Electronics, Information and Communication (ICEIC), 2012.
11. Youngjae Kim, Sarp Oral, Galen Shipman, Junghee Lee, David Dillow, and Feiyi Wang, “Harmonia: A Globally Coordinated Garbage Collector for Arrays of Solid-State Drives,” in Proc. of 27th IEEE Symposium on Massive Storage Systems and Technologies (MSST), 2011.
12. Junghee Lee, Chrysostomos Nicopoulos, Yongjae Lee, Hyunggyu Lee, and Jongman Kim, “Hardware-based Job Queue Management for Manycore Architectures and OpenMP Environments,” in Proc. of IEEE International Parallel and Distributed Processing Symposium (IPDPS), 2011.
13. Junghee Lee, Youngjae Kim, Galen M. Shipman, Sarp Oral, Feiyi Wang and Jongman Kim, “A Semi-Preemptive Garbage Collector for Solid State Drives,” in Proc. of IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS), 2011.
14. Junghee Lee, Denis Paterson, Scott O’Neill, Hongchul Kim, Sangjun Nam, and Jongman Kim, “Binary Replacement Technique for Application Programming Interface Level Simulation,” in Proc. of Embedded and Real Time Software and Systems (ERTS2), 2010.
15. Junghee Lee and Joonhwan Yi, “Industrial Experience with Cycle Error Computation of Cycle-accurate Transaction Level Models,” in Proc. of IEEE International SOC Conference (SOCC), 2007.
16. Junghee Lee and Joonhwan Yi, “Cycle Error Correction in Asynchronous Clock Modeling for Cycle-Based Simulation,” in Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC), 2006.
17. Chiho Cha, Junghee Lee, and Jonghoon Lee, et al., “Improving the Performance of CDMA2000 EV-DO System by Architecture Optimizations Using ViP (Virtual Platform),” in Proc. of Korean Conference on Semiconductors, 2006.
18. Junghee Lee, Chanik Park, and Soonhoi Ha, “Memory Access Pattern Analysis and Stream Cache Design for Multimedia Applications,” in Proc. of Asia and South Pacific Design Automation Conference (ASP-DAC), 2003.