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- B. Liu and S. X.-D. Tan, “Efficient Decoupling Capacitor Insertion in VLSI Power/Ground Networks by Semidefinite and Linear Programs,” IEEE Trans. on VLSI Systems, 11(8), 2007.
- A. B. Kahng, B. Liu, and Q. Wang, “Stochastic Power/Ground Supply Voltage Prediction and Optimization via Analytical Placement,” IEEE Trans. on VLSI Systems, 15(8), 2007, pp. 904-912.
- A. B. Kahng, B. Liu, and X. Xu, “Statistical Timing Analysis in the Presence of Signal Integrity Effects,” IEEE Trans. on Computer-Aided Design, Oct. 2007.
- A. B. Kahng, B. Liu and I. Mandoiu, “Non-tree Routing for Reliability and Yield Improvement,” IEEE Trans. on Computer-Aided Design, 23(1), 2004, pp.148-156.
- C. Albrecht, A. B. Kahng, B. Liu, I. Mandoiu and A. Zelikovsky, “On the Skew-Bounded Minimum-Buffer Routing Tree Problem,” IEEE Trans. on Computer-Aided Design, 22(7), 2003, pp. 937-945.
- C. Alpert, A. B. Kahng, B. Liu, I. Mandoiu and A. Zelikovsky, “Minimum Buffered Routing with Bounded Capacitive Load for Slew Rate and Reliability Control,” IEEE Trans. on Computer-Aided Design, 22(3), 2003, pp. 241-253.
- C. J. Alpert, G. Gandham, M. Hrkic, J. Hu, A. B. Kahng, J. Lillis, B. Liu, S. T. Quay, S. S. Sapatnekar and A. J. Sullivan, “Buffered Steiner Trees for Difficult Instances,” IEEE Trans. on Computer-Aided Design, 21(1), 2002, pp. 3-14.
- C.-K. Cheng, A. B. Kahng, B. Liu and D. Stroobandt, “Toward Better Wireload Models in the Presence of Obstacles,” IEEE Trans. on VLSI Systems, 10(2), 2002, pp. 177-188.
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